A fast trigger is important for discriminating charged tracks
produced at the interaction point from background tracks from
interactions of spent electrons with the material around the beam
pipe, beam gas events, and cosmic rays. The
trigger was designed
by utilizing the
-position information from the three cathode
layers and the axial/stereo layers of CDC [85]. The
cathode hit information provides direct information on the
-coordinate close to the interaction point. The accuracy of the
cathode
-position is determined by the cathode-strip width of 8 mm
and the cathode-strip-cluster size which is typically from 1 to 3
strips for a normally incident track. Since these cathode layers are
located at the innermost CDC region, the additional
information
provided by the stereo wires is necessary for good trigger
performance.
Fig.
shows the trigger tower map One axial/stereo z-trigger layer consists of consecutive two axial
and two stereo layers.
Each pair of neighboring axial and stereo wires
yields a calculated
-position. The coincidence of two axial or
stereo layers is formed to reduce accidental trigger signals due to
uncorrelated noise hits.
The accuracy of calculated
-coordinates is
around 50 cm for a single pair of axial stereo cell hits.
The -position is calculated in 8 azimuthal
segments
individually. In order to avoid the inefficiency for tracks around the
segment boundary, the calculated
signals of adjacent
segments are ORed. The tracks in the
-
plane (
-tracks) are
reconstructed by seven sets of
-positions as shown in
Fig.
. A pattern yielded by tracks is
represented by a "trigger tower map." When the
-positions in the
inner and outer layers line up with the same tower bit, which presents
the same polar angle from the
-axis (
), it is regarded as
being a track from the interaction point. In order to reduce the
effects of inefficiencies of CDC wire and cathode hits, we require at
least two hit layers among the three cathode layers and at least one
hit layer in each of the middle and outer layers with the logic shown
in
Fig.
.
The schematic diagram of the -trigger logic is shown in
Fig.
. There are five processes for the wire
logic and four for the cathode logic. The number of
-tracks formed
by the trigger tower process is counted in the final decision process.
Finally, a two-bit signal corresponding to the number of
tracks
originating from the interaction point is transmitted to GDL.
The -trigger system is constructed with three types of modules.
The detail of hardware implementation is described in
Ref. [85].
The main trigger module is a 9U-VME containing 7 Xilinx FPGA chips
(XC4005HPG223) with 384 I/O's.
All
-trigger logics are implemented in the FPGA chips using 53 of
these modules.
The
-trigger processes are run in a pipeline mode synchronized with
a 16 MHz clock in order to avoid any deadtime losses. The trigger
signals from the
-calculation and trigger-tower logic are read by
TDC to monitor the
-trigger logic.
The
-trigger logic run in a pipelined mode with 11 steps
synchronized with a 16 MHz clock requires 687.5 ns. Including the
drift time in CDC and propagation delay in the cables, the maximum
latency of the
-trigger system was found to be about 1.45
s.
Figure shows the trigger efficiency as a
function of the distance from the IP (
) for single tracks with
500 MeV/c (left
figure) and for events with the "at least one
-track" condition
(right figure) for cosmic rays.
The tracks originating from cm are effectively rejected.
The efficiency is
greater than 98 % for single tracks with 300 MeV/c.
In order to keep the efficiency high, we require at least one
-track in the actual trigger condition. Because of quite high hit
rates at the innermost layers of the CDC due to the beam background,
the rejection power of the
-trigger is reduced.
Fig.
shows the
distribution of the track for
two-track events with and without the
-trigger requirement, in
which we require at least one
-track. The
-trigger reduces
about one-third of background events without losing beam interaction
events.