Front-end Electronics

Signals from each side of DSSDs are read out by electronics comprising VA1 front-end integrated circuits [18] mounted on ceramic hybrids. Each hybrid holds five 128-channel VA1 chips. Two hybrid cards are connected to an interface card (designated ABC) by 0.025'' pitch multiconductor cables terminated in nanostrip connectors [20]. ABCs are connected to a repeater (CORE) system through 2-m-long flat cables. Analog current signals from VA1 are converted to voltage signals and buffered in the repeater system before being transmitted to FADCs in the Belle electronics hut over 30-m-long shielded differential coaxial cables. A second signal data path, which is bidirectional, transmits the level-0 trigger signal (the ``hold'' pulse) and various digital clocking pulses that drive the readout to VA1. This path is also used to carry slow control and monitor data between the hybrids and an online computer. Figure shows a schematic drawing of the SVD readout system.

Figure: Schematic drawing of the SVD readout system.